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authordavidovski <david@davidovski.xyz>2022-06-15 20:02:02 +0100
committerdavidovski <david@davidovski.xyz>2022-06-15 20:02:02 +0100
commitd2567bfbdf0e9fa6db0a6ed1534831ec859a3e03 (patch)
tree684a17eebf446aa1adab1097616f1882c8d51568 /repo/ceph/20-pci.patch
parentd1fc3393cca72e8e432f827f7624e38734fad6dc (diff)
added deps for qemu
Diffstat (limited to 'repo/ceph/20-pci.patch')
-rw-r--r--repo/ceph/20-pci.patch63
1 files changed, 63 insertions, 0 deletions
diff --git a/repo/ceph/20-pci.patch b/repo/ceph/20-pci.patch
new file mode 100644
index 0000000..c16e276
--- /dev/null
+++ b/repo/ceph/20-pci.patch
@@ -0,0 +1,63 @@
+Musl patch for pci
+
+diff -Nurp a/src/spdk/dpdk/drivers/bus/pci/linux/pci_uio.c b/src/spdk/dpdk/drivers/bus/pci/linux/pci_uio.c
+--- a/src/spdk/dpdk/drivers/bus/pci/linux/pci_uio.c 2020-11-21 13:07:44.255206657 +0000
++++ b/src/spdk/dpdk/drivers/bus/pci/linux/pci_uio.c 2020-11-21 13:04:06.488285583 +0000
+@@ -14,6 +14,32 @@
+
+ #if defined(RTE_ARCH_X86)
+ #include <sys/io.h>
++#if defined(__GLIBC__)
++#define pci_uio_outl_p outl_p
++#define pci_uio_outw_p outw_p
++#define pci_uio_outb_p outb_p
++#else
++static inline void
++pci_uio_outl_p(unsigned int value, unsigned short int port)
++{
++ __asm__ __volatile__ ("outl %0,%w1\noutb %%al,$0x80" : : "a" (value),
++ "Nd" (port));
++}
++
++static inline void
++pci_uio_outw_p(unsigned short int value, unsigned short int port)
++{
++ __asm__ __volatile__ ("outw %w0,%w1\noutb %%al,$0x80" : : "a" (value),
++ "Nd" (port));
++}
++
++static inline void
++pci_uio_outb_p(unsigned char value, unsigned short int port)
++{
++ __asm__ __volatile__ ("outb %b0,%w1\noutb %%al,$0x80" : : "a" (value),
++ "Nd" (port));
++}
++#endif
+ #endif
+
+ #include <rte_string_fns.h>
+@@ -528,21 +554,21 @@ pci_uio_ioport_write(struct rte_pci_iopo
+ if (len >= 4) {
+ size = 4;
+ #if defined(RTE_ARCH_X86)
+- outl_p(*(const uint32_t *)s, reg);
++ pci_uio_outl_p(*(const uint32_t *)s, reg);
+ #else
+ *(volatile uint32_t *)reg = *(const uint32_t *)s;
+ #endif
+ } else if (len >= 2) {
+ size = 2;
+ #if defined(RTE_ARCH_X86)
+- outw_p(*(const uint16_t *)s, reg);
++ pci_uio_outw_p(*(const uint16_t *)s, reg);
+ #else
+ *(volatile uint16_t *)reg = *(const uint16_t *)s;
+ #endif
+ } else {
+ size = 1;
+ #if defined(RTE_ARCH_X86)
+- outb_p(*s, reg);
++ pci_uio_outb_p(*s, reg);
+ #else
+ *(volatile uint8_t *)reg = *s;
+ #endif