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authordavidovski <david@davidovski.xyz>2022-06-06 21:25:48 +0000
committerdavidovski <david@davidovski.xyz>2022-06-06 21:25:48 +0000
commitccc722b7ed330198d82a3cf28ead76d6d107a70a (patch)
tree7611b3cc4f3ca681524fa28b174a0253eb802e0e /repo/lmdb/cacheflush.patch
parent9ee32689f0b57b9e1de6d22c84ce8e3700b6122b (diff)
added java
Diffstat (limited to 'repo/lmdb/cacheflush.patch')
-rw-r--r--repo/lmdb/cacheflush.patch12
1 files changed, 12 insertions, 0 deletions
diff --git a/repo/lmdb/cacheflush.patch b/repo/lmdb/cacheflush.patch
new file mode 100644
index 0000000..281a031
--- /dev/null
+++ b/repo/lmdb/cacheflush.patch
@@ -0,0 +1,12 @@
+--- a/mdb.c
++++ b/mdb.c
+@@ -77,8 +77,7 @@
+
+ #if defined(__mips) && defined(__linux)
+ /* MIPS has cache coherency issues, requires explicit cache control */
+-#include <asm/cachectl.h>
+-extern int cacheflush(char *addr, int nbytes, int cache);
++#include <sys/cachectl.h>
+ #define CACHEFLUSH(addr, bytes, cache) cacheflush(addr, bytes, cache)
+ #else
+ #define CACHEFLUSH(addr, bytes, cache)