blob: 281a03124c1987f478b855cf1de875ba0f0350b2 (
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--- a/mdb.c
+++ b/mdb.c
@@ -77,8 +77,7 @@
#if defined(__mips) && defined(__linux)
/* MIPS has cache coherency issues, requires explicit cache control */
-#include <asm/cachectl.h>
-extern int cacheflush(char *addr, int nbytes, int cache);
+#include <sys/cachectl.h>
#define CACHEFLUSH(addr, bytes, cache) cacheflush(addr, bytes, cache)
#else
#define CACHEFLUSH(addr, bytes, cache)
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